Transients in reconfigurable signal processing channels

System reconfiguration at run time may cause unacceptable transients. In this paper, a new design methodology is proposed for reducing transients due to reconfiguration in recursive digital signal processing (DSP) systems. The technique utilizes the fact that, 1) transfer functions can be realized by different processing structures, and 2) these alternative realizations show different transient properties when reconfigured in one step. By selecting processing structures that are less prone to reconfiguration transients, i.e., generate smaller transients due to the abrupt change of coefficients, transients can be reduced for a wide-range of input–output mappings. Selection of the preferable structures is based on the evaluation and control of the dynamic range of the internal variables.